

ABSTRACT

A CMOS push-pull output buffer is powered by a low-voltage (e.g., +3.3 V) supply, but is able to withstand elevation of its output node to higher voltage without sinking large currents into the low-voltage supply. Thus, this buffer is able to operate tied to a bus that has various higher-voltage sources also operating on the bus. The P-channel pull-up transistor (11) of this buffer has another P-channel transistor (23) connecting its gate to the output node so that this gate will follow the voltage of the output node and thus keep the pull-up (11) transistor from conducting from the output node to the power supply (VDD3). The inverter (15) which drives this gate of the P-channel pull-up transistor (11) is also protected from reverse current into its low-voltage power supply by a series N-channel transistor (12) which will exhibit body effect and is sized to present a significant resistance.



